FPGA is our passion

We are changing the world through this. So you can!
Join the FPGA Hackathon we organize in Kraków to learn more about the technology gaining more and more popularity!

Sharing this passion is the reason why we decided to create this Conference and Hackathon.

FPGA technology is one of the foundations for the revolutionary projects like fast telecommunication or autonomous cars. Thanks to the fast data processing and an ability to work on many resources, FPGA is a key in banking and insurance sector (acceleration of calculations and risk analysis based on data) or stock operations.

And that’s not all!

The mission of the event is to spread the knowledge of FPGA topics, meeting interesting guests and common networking.

Conference

November 19, 2021

Hackathon

November 20-21, 2021

What do you get at The Conference?

• knowledge of the latest FPGA challenges and solutions

• meetings with inspiring specialists and building a social and business relationship

• attending interesting lectures

• the opportunity to share your knowledge with FPGA specialists and enthusiasts

How can you join The Event?

Registration for the Conference and the Hackathon will start on October 18, 2021 so stay tuned!

Imagine you’re sitting in a spaceship, ready for the greatest adventure of your life – the Mission to Mars. There is an overwhelming darkness around you, from time to time you only see the flash of a burning star. But suddenly something changes. In the distance you see the masses coming, thousands of meteors flying straight at you.

In this chaos, you try to save the most precious thing, your ship.
But the only thing that can help you is the meteor coordinates from the mysterious satellites. Your radio, based on FPGA technology, can’t keep up with their readings, gets lost in interpretation. You only have 24 hours to create a key and read the clues correctly.

Do you dare to take that step?

Will you be among the hundreds of daredevils who will save the Mission to Mars?

What do you need?

A team of 2-3 people ready for the challenge (individual registration will not be possible).
If you don’t have a team contact us and we will help!
Programming skills with FPGA background (even if it’s just a little, it is good enough) / Technical skills in FPGA-related areas

What do we provide?

Development board per team with USB programmer cable and power supplier (Cyclone V GX Starter Kit)

Access to selected FPGA Design and Verification related tools under provided licenses

  • Intel Quartus Prime Lite
  • Questa Advanced Simulator – Siemens EDA
  • Onespin – Siemens EDA
  • Catapult High-Level Synthesis & Verification – Siemens EDA
  • MATLAB & Simulink – MathWorks

What are you fighting for?

In addition to the enormous knowledge you gain, we guarantee you great fun with the same enthusiasts.
As well as material prizes received from sponsors and event partners.

1st place

3x OCULUS QUEST 2 256GB

3x Cyclone V GX Starter Kit

Will be announced soon

2nd place

3x OCULUS QUEST 2 128GB

3x Cyclone V GX Starter Kit

3rd place

3x JABRA Evolve 2 65 MS Stereo

3x Cyclone V GX Starter Kit

Conference schedule

start1

08:45 – 09:00

Conference opening
Daniel Aronsson

09:00 – 09:45
Daniel Aronsson, Mathworks

"Fixing bugs early"
coffee

09:45 – 09:55

Short break
Esa-Matti Turtinen

09:55 – 10:40
Esa-Matti Turtinen, Siemens

"Highlevel synthesis / CatapultC"
coffee

10:40 – 10:45

Short break
Maciej Wójtowicz

10:45 – 12:15
Maciej Wojtowicz, Nokia

"Automate hacking of your RTL code"
eat

12:15 – 13:00

Lunch break
aldec

13:00 – 13:45
Adam Milik, Aldec

"Logic Synthesis and Verification made simple"
coffee

13:45 – 13:50

Short break
Michał Kahl

13:50 – 14:10
Michał Kahl, Nokia

"How to design FPGAs (in Clojure)"
announcement

14:10 – 14:25

Science clubs presentations
coffee

14:25 – 14:35

Short break
Rafał Kozik

14:35 – 15:20
Rafał Kozik, Nokia

"Verilator - Open Source simulator"
coffee

15:20 – 15:30

Short break
Neil Rattray

15:30 – 16:15
Neil Rattray, Siemens

"Automatic Formal Checking"
close

16:15 – 16:30

Conference closure

Hackathon schedule

20 November, 2021

announcement

11:00 AM

Opening ceremony

Hackathon opening and task presentation

question

11:15 AM – 12:00 PM

Q&A for hackathon task

Questions and answers so that each participant knows the task well and knows what to do

start1

12:00 PM

Official start of hacking!

21 November, 2021

close

11:00 AM

Official end of hacking
break

11:00 AM – 12:00 PM

Technical break

Validating all task solutions provided by winners.

award

12:00 PM

Winners presentation and Hackathon closure

Meet our speakers

Michał Kahl

Nokia
Michał has worked in Nokia and Motorola for over 14 years. During his career as an FPGA engineer, he learned to appreciate good coding practices in RTL design. Graduate of Jagiellonian University (physics) and AGH University of Science and Technology (electronics and telecommunications), lecturer in Nokia FPGA Academy, co-author of three publications on nonlinear models in curved spacetimes. Apart from programmable devices, his professional interests cover information theory, functional programming and machine learning. Among his scientific interests are nonlinear differential equations and general relativity.
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Daniel Aronsson

Mathworks
Daniel Aronsson is a senior application engineer at MathWorks with specialization in signal processing and communications system design. He has several years of experience in these fields and he also works regularly with computer vision and FPGA system implementation. Daniel holds a Ph.D. in wireless communications from Uppsala University, on the topic of MIMO channel prediction
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Maciej Wojtowicz

Nokia
Maciej Wojtowicz has got silicon proven experience in designing complex digital controllers, modules and devices using best in class project organization techniques (from planning phase to completion). He has had deep ASIC flow experience (Verilog for Synthesis, STA, P&R, CDC, LEC, Lint, DfT, ATPG etc.) including quality management for all these flows. During his time career, he was dealing with complex and challenging customer issues by meetings, technical calls, debug sessions, exchanging e-mails and was working closely with cross-functional teams including MKT/Sales on how to overcome issues and plan the roadmap. He has got deep experience in deploying ISO26262 requirements for Semiconductors resulting in getting ASIL-B Certification for two projects and holds proven records of improving and automation of global company automotive methodology. At Nokia, Maciej is working on critical 5G design components and various cross-functional quality programs that aim to improve design practices at Unit level. Maciej is also managing technical technology transfer programs and provides trainings for designers.
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Rafał Kozik

Nokia
Rafal graduates of Control Engineering at AGH University of Science and Technology. Used to work with network drivers for FreeBSD and DPDK. For 2 years working in Nokia and designing FPGA for 5G networks. Author of popular-science articles about electronic and FPGA published in Elektronika dla Wszystkich, Elektronika Praktyczna and Magazyn Programista.
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Esa-Matti Turtinen

Siemens
Esa-Matti Turtinen is Field Application Engineer in Siemens EDA focusing on HLS (High-Level Synthesis) and HLV (High-Level Verification) solutions with Catapult HLS. Prior to joining Siemens in 2018, he gained about 10 years of experience working in various different roles around FPGA/ASIC development and management in telecommunications industry. Esa-Matti received his M.Sc. from the University of Oulu in Finland.
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Neil Rattray

Siemens
Neil Rattray, Senior Field Application Engineer at OneSpin: A Siemens Business, has over 20 years of experience in EDA, supporting both design and verification flows. Neil joined the OneSpin team in 2016 and works closely with key customers. Neil has deep technical knowledge from working as both a designer and field application engineer. He started his career as a hardware design engineer but later moved to application engineering, supporting FPGA products, before ultimately making the leap to EDA. Neil’s breadth of experience enables him to apply formal verification efficiently and thoughtfully within his customers’ design teams. He cultivates strong relationships with OneSpin 360™ users and has a passion for driving their success with the superior level of support he provides. Neil holds a Bachelor of Engineering degree in Electronic Engineering from Queen Mary College, University of London. When not working with customers, he devotes his time to family, sports, and his many woodworking projects. Neil is based in the Netherlands.
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Adam Milik

Aldec
Adam Milik – Is a co-simulation specialist at Aldec ADT and academic teacher at the Silesian University of Technology of Gliwice with 23 years of experience. His main interests are: high-level direct hardware synthesis of control programs (PLCs) and computation algorithms, logic synthesis for programmable devices, co-simulation in heterogeneous environments, control programs implementation and partitioning for multithreaded execution.
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Frequently Asked Questions

What is the FPGA Hackathon and Conference – Hack into Mars? 
It’s a social coding contest where FPGA developers collaborate to solve given tasks and compete for prizes. Hackathon will be preceded by FPGA subject related Conference . This Event is also a great networking opportunity! 

 

Who is this Event for? 

The Conference is for everyone interested in FPGA subject. 

The Hackathon is for students and professionals of any engineering and technology career, enthusiasts of microcontrollers, FPGAs, programming and electronics in general.  

If you would like to have your first experience solving basic problems of FPGA or you are already experienced and you want to challenge your skills on FPGA, then this hackathon is for you! 

 

How much does it cost? 

FREE. Registration and participation in both Hackathon and Conference is free of charge. 

 

When and where? 

19th-21st November , 2021 . Fully online.

How many people should be in a Team? 

The Team should consist of 2-3 people.

 

I don’t have a Team, what now? 

We do encourage participants to start forming teams before the Event. However, if you don’t manage to find one, apply as an individual. We are organizing a team forming activity before the hacking starts. 

What is a task?  

The detail regarding the task will be provided on Hackathon start day during the Event.  

  

How will Teams be judged? 

Judging criteria will be described in separate documents. Details coming soon.  

What is the language of the contest?  

The Hackathon and Conference is in English.  

  

 What should I prepare?  

Prepare your laptop, mobile phone, wearable computing devices and whatever technology inspires you. Check your Internet access. Make sure that you will feel comfortable during intense hacking. 
  

 Do I have to stay the whole time during Hackathon?  
Competitors don’t have to stay overnight to be eligible to win, but we strongly encourage to stay the whole 22h. At least one team member must be present at the results presentation to show their Team’s work effects. 

 

What will be provided during Hackathon?   

1 FPGA board per Team, virtual machines with SW delivered by our Sponsors required to fill the tasks. There will also be Mentors who will help you in troubles. 

 

Will there be prizes?  

You bet!  

   

Where do I sign up?  

Registration for The Event will start on October 18, 2021.

Note, there are separate registration forms for Conference and Hackathon. 

  

What if I have more questions?  

Email us and let us know how we can help. You can also find more details in FPGA Hackathon and Conference Terms and Regulations. 

Are you interested but want to know more?

Check the FAQ at first.
If there’s no answer for your question, please feel free to contact us with an e-mail:

Click here

Special thanks to all that helped us

Organizers

Sponsors

Patrons

Media partners