ABOUT THE CONFERENCE

FPGA is our passion. Through it we are changing the world.

Sharing this passion is the reason why we decided to create this conference.

The technology FPGA is one of the foundations for the revolutionary projects like fast telecommunication or autonomous cars. Thanks to the fast data processing and an ability to work on many resources, FPGA is a key in banking and insurance sector (acceleration of calculations and risk analysis based on data) or stock operations. And that’s not all!

The mission of the event is spreading the knowledge of FPGA topics, meeting interesting guests and common networking.

 

What do you get at the conference?

  • knowledge of the latest FPGA challenges and solutions
  • meetings with inspiring specialists and building a social and business relationship
  • attending interesting lectures
  • the opportunity to share your knowledge with FPGA specialists and enthusiasts

 

How can you join the event?

The registration will be available soon. Stay tuned!

ABOUT THE HACKATHON

Imagine you’re sitting in a spaceship, ready for the greatest adventure of your life – the Mission to Mars.

There is an overwhelming darkness around you, from time to time you only see the flash of a burning star.

But suddenly something changes. In the distance you see the masses coming, thousands of meteors flying straight at you.

In this chaos, you try to save the most precious thing, your ship. But the only thing that can help you is the meteor coordinates from the mysterious satellites.

Your radio, based on FPGA technology, can’t keep up with their readings, gets lost in interpretation.

You only have 24 hours to create a key and read the clues correctly.

Do you dare to take that step?

Will you be among the hundreds of daredevils who will save the Mission to Mars?

 

What do you need?

A team of 2-3 people ready for the challenge (individual registration will not be possible). If you don’t have a team contact us and we will help!

Programming skills with FPGA background (even if it’s just a little, it is good enough) / Technical skills in FPGA-related areas.

 

What do we provide?

HW: development board per team with USB programmer cable and power supplier (Cyclone V GX Starter Kit),

Access to selected FPGA Design and Verification related tools under provided licenses:

  • MATLAB & Simulink from MathWorks,

 

  • Questa Simulator from Mentor Graphics,

 

  • OneSpinFormal Verification tools from Onespin,

 

  • Quartus from Intel

https://www.intel.pl/content/www/pl/pl/software/programmable/quartus-prime/overview.html

  • Active-HDL from Aldec

 

What are you fighting for?

In addition to the enormous knowledge you gain, we guarantee great fun with the same enthusiasts as you, as well as material prizes received from sponsors and event partners.

Prize list will be published soon. At this moment value of all prizes is 25 000 PLN.

 

How can you join the event?

The only thing you need to do, to become a hackathon participant is to register your team or yourself by filling the form. Minimum team size which will be accepted during registration is 3 members (then at least one person will be added from individual subscriptions). The registration form will be available soon, so follow our social media to be up to date!

 

Are you interested, but want to know more?

Check the FAQ at first. If there’s no answer for your question, please feel free to contact us with an e-mail:

[email protected]

EVENT SCHEDULE

CONFERENCE | 20 November 2020
Due to the change in the form of the conference, all hours are subject to change
8:45 - 9:00 Opening ceremony

Applying Formal Technologies to FPGA Verification

Speaker: Juho Järvinen (Mentor, a Siemens Business)

9:00 – 9:45

Read More

9:45 - 9:55 Short break

Targeting Signal Processing Algorithms to Systems-on-FPGA

Speaker: Werner Bachhuber (MathWorks)
9:55 – 10:40

Read More

10:40 - 10:45 Short break

Refactoring SystemVerilog code

Speaker: Michał Kahl (Nokia)
10:45 – 11:15

Read More

11:15 - 11:20 Short break

Clock Domain Crossing - Design Techniques

Speaker: Sławek Grabowski (Aldec)
11:20 – 12:05

Read More

12:05 - 12:50 Lunch break

No title yet

Speaker: TBD
12:50 – 13:20

Read More

13:20 - 13:25 Short break

Programming Pearls on FPGA: Implementing Linear Scan for Pulse Detection

Speaker: Aleksander Łoś
13:25 – 14:10

Read More

14:10 - 14:20 Short break

Verifying Functional Correctness, Security and Trust in FPGA Designs

Speaker: Vladislav Palfy (OneSpin)
14:20 – 15:05

Read More

15:05 - 15:10 Short break

No title yet

Speaker: TBD

15:10 – 16:00

16:00 - 16:15 Conference closure

Official Hackathon start

t/b/d – 17:00

Official Hackathon finish

t/b/d – 15:00

Results checking

t/b/d – 15:00-16:00

Award Ceremony

t/b/d – 16:00

SPEAKERS

Vladislav Palfy

(OneSpin)

Michał Kahl

(Nokia)

Michał has worked in Nokia and Motorola for over 13 years. During his career as an FPGA engineer, he learned to appreciate good coding practices in RTL design. Graduate of Jagiellonian University (physics) and AGH University of Science and Technology (electronics and telecommunications), lecturer in Nokia FPGA Academy, co-author of two publications on nonlinear models in curved spacetimes. Apart from programmable devices, his professional interests cover information theory,  functional programming and machine learning. Among his scientific interests are nonlinear differential equations and general relativity.

Werner Bachhuber

(MathWorks)

Dr.-Ing. Werner Bachhuber holds a PhD equivalent degree from the Institute for Integrated Circuits at the Technical University of Munich/Germany. Before joining MathWorks he worked as a Senior Field Application Engineer for an FPGA vendor. Prior to this role he held various positions in ASIC and ASSP development focused on high data rate wireline communication systems. His experience covers all steps in the design and verification flow from the requirement specification down to the physical implementation in silicon.

Aleksander Łoś

(Nokia)

Short bio of this prelegent.

Juho Järvinen

(Mentor, a Siemens Business)

Short bio of this prelegent.

FPGA Hackathon Krakow lecturer Slawek Grabowski

Sławek Grabowski

(Aldec)

Slawek is Engineering Manager at Aldec Hardware Division. Graduate from AGH University of Science and Technology in Krakow, Poland 1998.

Slawek has over 22 years of experience in the area of FPGA design and verification and ASIC emulation. He patented technologies for mapping ASIC designs into multiple FPGAs.

He is one of the main architects of Aldec HES emulation and prototyping systems. Slawek has been involved in verification of over 50 avionics designs where quality and robustness are crucial for flights safety.

FREQUENTLY ASKED QUESTIONS

About Hack into Mars Event

What is the FPGA Hackathon and Conference - Hack into Mars?

Social coding contest where FPGA developers collaborate to solve given tasks and compete for prizes. Hackathon will be preceded by FPGA subject related Conference.

This Event is also a great networking opportunity! 

Who is this Event for?

The Conference is for everyone interested in FPGA subject. 

 

The Hackathon is for students and professionals of any engineering and technology career, enthusiasts of microcontrollers, FPGAs, programming and electronics in general.  

If you would like to have your first experience solving basic problems of FPGA or you are already experienced and you want to challenge your skills on FPGA, then this hackathon is for you! 

How much does it cost?

FREE. Registration and participation in both Hackathon and Conference is free of charge.

When and where?

Autumn. Precise dates will be provided soon.

Considering safety of Participants we have decided to switch formula of Conference and Hackathon to online mode

Teams

How many people should be in a Team?

Team should consist of 2-3 people.

Individual registration is not possible

I don’t have a Team, what now?

We do encourage participants to start forming teams before the Event. However, if you don’t manage to find one, write to us on Facebook. We will be organizing a team forming activity before the hacking starts.

Task

What is a Task?

The detail regarding the task will be provided on Hackathon start day during the Event.

How the Teams will be judged?

Judging criteria will be described in separate documents.

Details coming soon.

Organizational Information

What is the language of the contest?

The Hackathon and The Conference will be held in English.

What should I prepare?

Prepare your laptop, mobile phone, wearable computing devices and whatever technology inspires you. Don’t forget about your chargers. Make sure that you will feel comfortable during intense hacking. Above all, prepare your energy and your brain!

Do I have to stay online the whole time?

Competitors don’t have to stay online to be eligible to win, but we strongly encourage to stay up the whole 22 hours. At least one team member should be online at the results presentation. Note, in case your Team wins competition, your prize will be shipped to the address you have provided in Registration form.

What will be provided during the Hackathon?

There will be Mentors willing to help you, 1 FPGA board per Team with online access and virtual machines with SW delivered by our Sponsors, required to complete the tasks.

Will there be prizes?

You bet!

Besides, there will be “thank you” pack sent after the Event to active Competitors of Hackathon.

Will there be food?

Due to online formula we cannot provide food

Where do I sign up?

Registration will be available soon! 

Note, there are separate registration forms for the Conference and the Hackathon.

What if I have more questions?

Email us or write to us on Facebook and let us know how we can help. 

You can also find more details in FPGA Hackathon and Conference Terms and Regulations which will be published closer to the Event

ORGANIZERS

PATRONS

SPONSORS

Aldec logo
Oprogramowanie Naukowo-Techniczke logo
Mentor logo