FPGA is our passion.

Vladislav Palfy, Director of Application Engineering at OneSpin Solutions, has over 10 years of experience in EDA in field application engineering and management. Vladislav joined the team in 2015 and is responsible for leading a multinational team of engineers that support OneSpin’s existing and future customers.

Vladislav has deep technical knowledge from working as a field application engineer and has been keeping his technical skills sharp throughout his transition into management. He has a passion for driving customers to success and cultivating the support philosophy within his team that sets OneSpin apart in the EDA world. Prior to joining the team at OneSpin, Vladislav was a team lead and methodology engineer at Methods2Business.

Vladislav holds a Master of Science in Electrical and Computer Engineering from the University of Novi Sad. When not on a customer visit, he devotes his time to family, sports, and volunteering with a charity organization.

Michał has worked in Nokia and Motorola for over 13 years. During his career as an FPGA engineer, he learned to appreciate good coding practices in RTL design.

Graduate of Jagiellonian University (physics) and AGH University of Science and Technology (electronics and telecommunications), lecturer in Nokia FPGA Academy, co-author of two publications on nonlinear models in curved spacetimes.

Apart from programmable devices, his professional interests cover information theory,  functional programming and machine learning. Among his scientific interests are nonlinear differential equations and general relativity.

Dr.-Ing. Werner Bachhuber holds a PhD equivalent degree from the Institute for Integrated Circuits at the Technical University of Munich/Germany.

Before joining MathWorks he worked as a Senior Field Application Engineer for an FPGA vendor. Prior to this role he held various positions in ASIC and ASSP development focused on high data rate wireline communication systems.

His experience covers all steps in the design and verification flow from the requirement specification down to the physical implementation in silicon.

Short bio of this prelegent.

Short bio of this prelegent.

Slawek is Engineering Manager at Aldec Hardware Division. Graduate from AGH University of Science and Technology in Krakow, Poland 1998.

Slawek has over 22 years of experience in the area of FPGA design and verification and ASIC emulation. He patented technologies for mapping ASIC designs into multiple FPGAs.

He is one of the main architects of Aldec HES emulation and prototyping systems. Slawek has been involved in verification of over 50 avionics designs where quality and robustness are crucial for flights safety.